? semiconductor components industries, llc, 2001 september, 2001 rev. 5 1 publication order number: nzmm7v0t4/d nzmm7v0t4 emi filter with esd protection features: ? 4 4 mm lead less mlf surface mount package ? 9 emi/rfi bidirectional apio lowpass filters ? esd protection meets iec600042 ? 50 watt peak pulse power, 8 20 s (all diodes under power) ? diode capacitance: 7 10 pf ? apio filter line capacitance: 22 20% pf ? low zener diode leakage: 1 a maximum ? zener breakdown voltage; 6 8 volts ? moisture sensitivity level 1 benefits: ? suppresses emi/rfi noise in systems subjected to electromagnetic interference ? small package size minimizes parasitic inductance, thus a more aidealo low pass filtering response typical applications: ? cellular phones ? communication systems ? computers ? portable products with input/output conductors maximum ratings rating symbol value unit peak power dissipation (note 1) 8 20 s pulse p pk 50 watts maximum junction temperature t j 150 c 1. all diodes under power 24 pin mlf case 485f plastic http://onsemi.com zmm7v = specific device code abc = date code device package shipping ordering information nzmm7v0t4 24 pin 4000/tape & reel low pass filter in 412 out 412 in 1 gnd in 3 out 1 v cc out 3 usb/rs232 cell circuit description 18 17 16 15 14 zmm7v abc marking diagram 13 1 2 3 4 5 6 24 23 22 21 20 19 7 8 9 10 11 12
nzmm7v0t4 http://onsemi.com 2 electrical characteristics symbol characteristic min typ max unit v z zener breakdown voltage, @ i zt = 1 ma 6.0 8.0 v i r zener leakage current, @ v r = 3 v n/a 1.0 a v f zener forward voltage, @ i f = 50 ma n/a 1.25 v capacitance zener internal capacitance, @ 0 v bias 7.0 10 pf capacitance zener/resistor array line capacitance 17.6 26.4 pf resistor resistance 90 110 f c (note 2) cutoff frequency 220 mhz 2. 50 source and 50 lead termination per figure 2 frequency response specification 50 50 spectrum analyzer tracking generator v in v out v g test conditions: source impedance = 50 load impedance = 50 input power = 0 dbm test board tg output rf input figure 1. measurement conditions nzmm7v nzmm7v figure 2. typical emi filter response (50 source and 50 lead termination) gain (db) 1.0 10 100 1000 f, frequency (mhz) 6.3 3000 10 20 0 30 40 50 output: 3 db = 220 mhz
nzmm7v0t4 http://onsemi.com 3 detailed device schematic 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 nc 24 23 22 21 20 19 applications information suppressing noise at the source ? filter all i/o signals leaving the noisy environment ? locate i/o driver circuits close to the connector ? use the longest rise/fall times possible for all digital signals reducing noise at the receiver ? filter all i/o signals entering the unit ? locate the i/o filters as close as possible to the connector minimizing noise coupling ? use multilayer pcbs to minimize power and ground inductance ? keep clock circuits away from the i/o connector ? ground planes should be used whenever possible ? minimize the loop area for all high speed signals ? provide for adequate power decoupling esd protection ? locate the suppression devices as close to the i/o connector as possible ? minimize the pcb trace length to the suppression device ? minimize the pcb trace length for the ground return for the suppression device
nzmm7v0t4 http://onsemi.com 4 outline dimensions emi filter with esd protection q x t a 0.25 x ab c k 2 pl h p f t b 0.25 y 2 pl n r e t y 0.20 x 2 pl t 0.20 y 2 pl t note 5 & 6 aa 0.05 t m v ad z w note 7 af 4 pl d l t m 0.10 note 4 x y g ag 4 pl af 4 pl ae 4 pl dim a min max min max inches 4.00 bsc 0.157 bsc millimeters b c --- 1.00 --- 0.039 d 0.18 0.30 0.007 e 3.75 bsc 0.148 bsc f 3.75 bsc 0.148 bsc g 0.50 bsc 0.020 bsc h 2.00 bsc 0.79 bsc k 0.01 0.05 0.000 0.002 l 0.30 0.55 0.012 0.022 m --- 12 --- n 2.00 bsc 0.079 bsc p 1.88 bsc 0.074 bsc q 0.50 dia 0.020 dia r 1.88 bsc 0.079 bsc v 2.50 bsc 0.098 bsc w 1.30 bsc 0.051 bsc z 2.50 bsc 0.098 bsc aa 0.65 0.80 0.026 0.031 ab 0.20 ref 0.008 ref ad 1.30 bsc 0.051 bsc ae 0.13 0.23 0.005 0.009 af 0.24 0.60 0.009 0.024 ag 0.30 0.45 0.012 0.018 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters 3. die thickness allowable is 0.305 mm maximum (0.012 inches maximum). 4. dimension d applies to plated terminal and is measured between 0.20 and 0.25 mm from terminal. 5. the pin #1 identifier must be on the top surface of the package by using identification mark or other feature of package body. 6. exact shape and size of this feature is optional. 7. the shape shown on four corners are not actual i/o. 8. package warpage max 0.05 mm. 24 19 18 13 1 6 712 4.00 bsc 0.157 bsc 0.012 12 24 pin mlf plastic package case 485f01 issue o
nzmm7v0t4 http://onsemi.com 5 notes
nzmm7v0t4 http://onsemi.com 6 notes
nzmm7v0t4 http://onsemi.com 7 notes
nzmm7v0t4 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. nzmm7v0t4/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
|
